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Renesas Electronics /R7FA6M4AF /POEG /POEGGD

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Interpret as POEGGD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PIDF 0 (0)IOCF 0 (0)OSTPF 0 (0)SSF 0 (0)PIDE 0 (0)IOCE 0 (0)OSTPE 0 (0)ST 0 (0)INV 0 (0)NFEN 0 (00)NFCS

NFCS=00, PIDF=0, INV=0, ST=0, PIDE=0, OSTPE=0, NFEN=0, SSF=0, IOCE=0, OSTPF=0, IOCF=0

Description

POEG Group D Setting Register

Fields

PIDF

Port Input Detection Flag

0 (0): No output-disable request from the GTETRGn pin occurred

1 (1): Output-disable request from the GTETRGn pin occurred.
IOCF

Detection Flag for GPT Output-Disable Request

0 (0): No output-disable request from GPT occurred.

1 (1): Output-disable request from GPT occurred.
OSTPF

Oscillation Stop Detection Flag

0 (0): No output-disable request from oscillation stop detection occurred

1 (1): Output-disable request from oscillation stop detection occurred
SSF

Software Stop Flag

0 (0): No output-disable request from software occurred

1 (1): Output-disable request from software occurred
PIDE

Port Input Detection Enable

0 (0): Disable output-disable requests from the GTETRGn pins

1 (1): Enable output-disable requests from the GTETRGn pins
IOCE

Enable for GPT Output-Disable Request

0 (0): Disable output-disable requests from GPT

1 (1): Enable output-disable requests from GPT
OSTPE

Oscillation Stop Detection Enable

0 (0): Disable output-disable requests from oscillation stop detection

1 (1): Enable output-disable requests from oscillation stop detection
ST

GTETRGn Input Status Flag

0 (0): GTETRGn input after filtering was 0

1 (1): GTETRGn input after filtering was 1
INV

GTETRGn Input Reverse

0 (0): Input GTETRGn as-is

1 (1): Input GTETRGn in reverse
NFEN

Noise Filter Enable

0 (0): Disable noise filtering

1 (1): Enable noise filtering
NFCS

Noise Filter Clock Select

0 (00): Sample GTETRGn pin input level three times every PCLKB

1 (01): Sample GTETRGn pin input level three times every PCLKB/8

2 (10): Sample GTETRGn pin input level three times every PCLKB/32

3 (11): Sample GTETRGn pin input level three times every PCLKB/128

Links

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Register License

This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all applicable laws, including copyright laws.

THIS SOFTWARE IS PROVIDED “AS IS” AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of this software. By using this software, you agree to the additional terms and conditions found by accessing the following link: http://www.renesas.com/disclaimer

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data